Overview#
Routing connects airwires with copper traces and vias. You can route interactively, let the autorouter do part or all of it, or mix the two. Polygons (copper pours) fill free space on a layer, usually with ground, and are essential for return currents, shielding and heat spreading.
Where to find it#
- Route Manual: PCB Design toolbar (command
ROUTE). Click an airwire or a component terminal to start. Route Multiple routes several parallel signals; Route Differential Pair handles pairs. - Autorouter: PCB Design toolbar QuickRoute > Autorouter, which opens the Autorouter Main Setup dialog. The QuickRoute family also has QuickRoute Airwire, Signal, Multiple, Smooth and Guided.
- Copper Pour: PCB Design toolbar Copper Pour (older name: Polygon). Its dialog sets corner and fill style, thermals, orphans and other options; after the shape is closed a Signal dialog asks for the signal name.
- Re-fill Copper Pours redoes pours after parts move; the command-line
RATSNESTrecalculates airwires and polygons. Unroute commands (andRIPUP) convert traces back to airwires.
Step by step#
Interactive routing#
- Select Route Manual. In the dialog set Loop Remove, Trace Bend (hold Ctrl and right-click to cycle the options), trace width and via properties; width can also be typed in the command line field.
- Click an airwire, drag to start the first segment, then click to place corners. Click the middle mouse button to drop a via and switch layer (the trace colour changes from red for top to blue for bottom). Backspace deletes the last segment.
- Click to finish on the target and press Esc to end the route. The airwire disappears.
- Rely on design rules: manual routing uses the best applicable clearance, copper width and via drill size rule. If it will not go, you are probably violating a rule.
Autorouter#
- Route critical nets manually first; Autodesk says manually routed tracks are left unchanged by the autorouter.
- Click QuickRoute > Autorouter. In the Main Setup dialog set the preferred direction per signal layer (
-horizontal,|vertical,/45 degrees,\135 degrees,*none,auto), the Effort (Low, Medium, High), the routing grid (or automatic grid selection), the number of threads, and whether to use the TopRouter variant. Use Select to route only chosen airwires. Load... / Save as... read and write a.ctlcontrol file. - Click Continue. The Routing Variants dialog lists several variants with percent-complete values; click >> for Advanced Options (Layer Costs, Cost Factors and Maximum, per pass: Busses, Route, Optimize 1-4; maximum ripup operations; number of optimization runs). Raising the via cost reduces vias.
- Click Start. Pick the variant you like best and click End Job to place that route.
- Review the result and use the Unroute commands on nets you dislike, then reroute by hand.
- Run DRC.
Polygons#
- Select the layer at the top of the canvas (for example Bottom), then click Copper Pour.
- Review the Copper Pour dialog, click vertices and double-click to close the shape. In the Signal dialog enter the signal name (for example
GND). Copper pours need a valid signal name to connect to a net; a Polygon Shape carries no signal and is only a graphic. - The pour fills automatically while auto-pour is on; if you turned Auto-pour all Copper Pours off, run Re-fill Copper Pours to update.
- Adjust isolate (clearance to other signals; default 0 means use the DRC clearance rules), spacing (hatch), fill style (solid or hatched), thermals and rank (older command-line options
CHANGE ISOLATE,SPACING,POUR,RANK,ORPHANS).
Options reference#
| Option | What it does | Notes/default |
|---|---|---|
| Trace width | Trace width | Drive from net class or the Copper Width rule's preferred value |
| Trace Bend | Bend shape of new segments | Ctrl + right-click cycles; 45 degree is standard practice |
| Via | Via Length, Pad Shape (square, round, octagon), Dimensions (auto or custom), Apply Solder Mask (Auto, Offset, Tented) | If a location violates rules, the via moves to the nearest acceptable spot |
| Autorouter Effort | Low, Medium or High | Number of routing variants created |
| Preferred direction | -, ` | , /, `, *, auto per layer |
| TopRouter | Gridless topological router | Typically fewer vias, can take longer |
| Cost factors | Layer Costs, Cost Factors, Maximum per pass | Raise via cost to reduce vias |
| Copper pour Isolate | Clearance from other signals | Default 0 = use DRC clearance rules |
| Copper pour fill | Solid or hatched | Solid for planes |
| Thermals | Thermal relief connection | Enabled by default |
| Orphans | Isolated copper islands | Dropped by default; you can keep them |
Tips and pitfalls#
Warning: Autodesk's help says that in practice the autorouter cannot always route a board completely, and recommends routing critical signals manually first. For high-speed, analog, power or RF layouts treat its output as a starting point (general guidance). Autodesk's pages do not state whether the autorouter is restricted on Personal use; see the limits page.
Tip: With auto-pour off, run Re-fill Copper Pours after moving parts or changing traces; stale pours cause false DRC results. Do this before DRC and CAM export.
Warning: Copper pours need a valid signal name to connect to a net. For a graphic-only shape use Polygon Shape instead; converting a pour to a polygon shape removes its signal name.
Tip: Use Via Stitching (Design tab > Route section; Cover Entire Board or Fill Polygon Shape) to stitch ground pours on both sides, especially near board edges and across split areas.
Tip: Put the polygon on the bottom first for a two-layer board, keeping the ground plane as unbroken as possible. Route signals mostly on top.
Warning: Thermal reliefs on high-current pads can restrict current. Autodesk suggests checking thermal relief spokes and isolate values; thermals can be switched off per polygon (
CHANGE THERMALS OFF) or per pad (NOTHERMALS flag).
Practice exercise#
Using the board from the previous page, add a GND copper pour on the bottom layer. Run the autorouter on a fresh copy of the board with via cost increased, and compare its result with your manual route: count vias and total trace length.
Autorouter setup in more detail#
Autodesk's help describes the autorouter as a ripup/retry router: when it cannot place a track, it removes tracks already placed and tries again, and the ripup depth influences both runtime and quality. It can route single signals, groups or all signals, honours net classes, uses the same design rules as DRC, routes up to 16 layers at once, supports blind and buried vias, and uses multiple cores. It runs in four optional stages: bus router, routing pass, TopRouter and optimization (the number of optimization passes must be set before starting). Autodesk recommends routing critical signals manually first. Once a job is finished, all tracks count as prerouted and cannot be optimized further.
Practical setup for a two-layer board:
| Setting | Suggested value | Reason |
|---|---|---|
| Top layer direction | Horizontal (-) | Perpendicular to the bottom layer (general guidance) |
| Bottom layer direction | Vertical (` | `) |
| Via cost | Raise above the default in Advanced Options (Autodesk gives no recommended number) | Fewer vias |
| Effort | Medium or High | More routing variants |
| Optimization passes | Set in Advanced Options (Optimize 1-4, Add for more) | Each pass reduces vias and smooths tracks |
| Net classes | Set before running | The router uses their widths and clearances |
When the run finishes, choose the variant you like in the Routing Variants dialog and click End Job to place that route (Autodesk's manual routing tutorial uses this step). Save a copy of the design before the first run so you can compare with the manual route.
Note: not confirmed in Autodesk's documentation: whether the autorouter is available on Personal use. Open QuickRoute > Autorouter in your install; if it is absent or blocked, route by hand.
Worked example: routing a bus with a fixed budget#
A 4-signal SPI bus connects an MCU and a flash chip on a 45 x 30 mm two-layer board. Net lengths: SCK 18 mm, MOSI 20 mm, MISO 19 mm, CS 17 mm.
- Set the net class for the four signals at 0.25 mm width, 0.2 mm clearance. Four traces at 0.25 mm with 0.2 mm gaps take 4 x 0.25 + 3 x 0.2 = 1.6 mm of channel width.
- Route them in parallel with no more than 2 vias in total. Keep the lengths within 2 mm of each other; at SPI speeds below 20 MHz the skew is irrelevant, but the habit helps for faster buses.
- Check the bottom layer: no bottom trace should cross under the top bus for more than a few mm, because each crossing breaks the ground return.
- Compare with the autorouter result on a copy: count vias, total length and routed layers. A typical hand route of this bus has 2 to 4 vias; an unconstrained autoroute of the same nets often has noticeably more.
Interactive routing options#
| Option | Effect | Notes |
|---|---|---|
| Trace Bend | Angle or shape of each new segment | Ctrl + right-click cycles the options |
| Loop Remove | Cuts out an old trace when a new one replaces it between the same points | On while rerouting |
| Miter | Rounds or bevels wire joints (MITER command; Miter nets or traces) | Radius sets the grade |
| Trace width | Typed in the command line field or set in the dialog | Prefer the rule's preferred value |
| Via Pattern (Route Multiple) | Controls how several vias are arranged | Use for parallel groups |
| QuickRoute Smooth | Reroutes a signal to the simplest path | Fewer bends and segments |
For USB 2.0 full speed (12 Mbit/s) you can route D+ and D- as a simple pair with lengths matched within about 2 mm. On a two-layer 1.6 mm board it is common to ignore the 90 ohm differential target and keep the traces short (under 50 mm).
Copper pours: sizing and connection#
| Copper pour item | Typical value (general guidance) | Why |
|---|---|---|
| Line width | 0.25 mm | Fill granularity |
| Isolate | 0.25 mm (not less than clearance); Autodesk's default 0 uses the DRC clearance | Prevents shorts |
| Thermal spoke width | 0.3 to 0.5 mm | Heat relief for hand soldering (Design Preferences > Supply holds thermal isolation) |
| Orphans | Dropped by default | Deletes copper islands connected to nothing |
| Fill | Solid | Better ground return and heat spreading; hatched gives lower capacitance |
| Rank | Lower rank pours first (CHANGE RANK) | Controls overlap priority |
Name every copper pour with its signal. Use a Copper Pour Cutout to keep copper out of an area, and Re-fill Copper Pours after any change when auto-pour is off.
Return paths and split planes#
Do not route signals across a break in the ground plane: the return current has to detour, creating a loop antenna. When a signal must cross, place a stitching via within 2 mm of the crossing so the return can change layers with it. For a switching regulator, keep the high di/dt loop (input capacitor, switch, diode) to a few square millimetres and keep the ground pour solid beneath it.
Failure modes and fixes#
| Symptom | Cause | Fix |
|---|---|---|
| Autorouter finishes with unrouted nets | Too few layers or too tight rules | Move parts to open channels, loosen the least critical clearance, retry with higher Effort or the TopRouter variant |
| Pour leaves isolated copper | Missing connections or blocked thermals | Add stitching vias; orphans are dropped by default |
| DRC clearance errors after pour | Pour not refreshed | Re-fill Copper Pours, then DRC |
| Pour does not connect to pad | Pour has no valid signal name, or the pad is on a different net | Set the pour's signal to GND; check the pad net |
| Pad overheats in assembly | Thermal relief disabled on a big plane | Enable thermals with 0.3 mm spokes on hand-soldered pads |
| Router ignores a trace width | Net class not assigned | Assign nets to the class (Class dialog) and reroute |
| Autorouted nets cross a ground split | Router has no return-path awareness (general guidance) | Unroute them and route manually |
Practice exercise#
Route the sensor board two ways and measure.
- Copy the design. On copy A, route all signals by hand with 45 degree bends and a bottom GND polygon.
- On copy B, set a higher via cost and run the autorouter (if available), then add the same polygon.
- Record via count, total trace length and the number of ground-plane breaks for each.
- Run DRC on both and confirm both are clean.
- For USB D+ and D-, measure the length difference in each copy; the target is under 2 mm.
- State in one sentence which copy you would send to fabrication and why.
Related#
- Board Layout
- ERC, Design Rules and DRC
- Electronics Limits in Personal Use