Overview#
Fusion's Personal use license is free for non-commercial hobby work, with some functionality restricted. Electronics is available, but with limits on design size. Autodesk's help topics mirrored for this guide do not state the Personal-use electronics limits at all; the figures below come from Autodesk marketing pages and web sources, they conflict, and you should confirm them yourself.
Warning: Do not rely on any number here for a commercial or deadline-critical decision. Autodesk's own comparison page and in-app messages are authoritative. Personal use is also restricted to non-commercial use by licence terms.
Where to find it#
- Autodesk's pricing/compare pages for Fusion list Personal vs. paid feature differences.
- In the app, limits appear as warnings when you add a sheet, layer, or draw outside the permitted area.
- Autodesk's forums for Fusion Electronics discuss the limits; these are user discussions, not documentation.
What is reported#
| Limit | Commonly reported Personal figure | Paid plan | Notes |
|---|---|---|---|
| Schematic sheets | 2 | Up to 999 | The 999-sheet maximum is confirmed in the Electronics help (Features, Design document); the 2-sheet figure is not in the help |
| Signal layers | 2 | Up to 16 | The help's Features list says the autorouter handles up to 16 signal layers and Layer Stack preferences allow up to 64; the Personal figure is not in the help. Autodesk's EAGLE page lists 2, its EAGLE-transition blog says 4 |
| Board area | 80 cm2 | Unlimited | Early forum text said "80 cm x 80 cm", which a community collaborator described as a typo for 80 square centimetres |
The figures conflict, in particular on layers (2 versus 4) and on how board area is stated. Check the current comparison page. Free licences that qualify as educational or startup have different terms again.
Step by step#
- Open Autodesk's current Fusion plan comparison and look for the Electronics rows.
- Create a test electronics design and add a second and third sheet to observe whether a warning appears.
- Draw an outline slightly larger than 80 cm2 (for example 100 x 100 mm = 100 cm2) and check for warnings.
- Open the Layer Stack Manager (Design > Layers) and see which layer counts you can select.
- Record what you observe with the version number for later reference.
Options reference#
| Area | Effect when over the limit | Workaround |
|---|---|---|
| Sheets | Cannot add more | Use hierarchy minimally, or split into separate designs |
| Layers | Cannot select more | Two-layer designs with careful ground pour |
| Board area | Warning or inability to work beyond | Split into panels/modules |
| Other features | Some advanced features reserved for paid plans/extensions | Verify per feature |
Tips and pitfalls#
Tip: For hobby work, 80 cm2 is large: roughly 9 x 9 cm. Most Arduino-class boards fit.
Tip: Plan the schematic on one or two sheets. Place connectors and power on one, logic on the other.
Warning: A two-layer board can limit signal integrity. If you need four layers and your plan blocks it, consider whether your project is simple enough to redesign.
Warning: Published Autodesk help does not say whether the autorouter or SPICE simulation is restricted on Personal use. Test both in your install (see the procedure below).
Note: not confirmed in Autodesk's documentation: how designs that exceed the caps behave when opened under Personal use.
Practice exercise#
Compute the area of your current board outline in cm2 and compare it to the limit you found on the comparison page. Note the date and version in a comment on your design.
What Autodesk states, and what is still unconfirmed#
Autodesk's EAGLE free-download page and Autodesk marketing describe the free hobbyist tier as two schematic sheets, two signal layers and 80 cm2 of board area. The Electronics help confirms only the upper limits: schematics can contain up to 999 sheets, and the Features page lists up to 16 signal layers for the autorouter. An Autodesk blog post says layer limits for free hobbyist users were lifted from 2 to 4.
Note: not confirmed in Autodesk's documentation: the Personal-use limits for sheets (2), signal layers (2 or 4) and board area (80 cm2), whether the autorouter is restricted on the free tier, and whether SPICE simulation runs on Personal use. Test these in your own install (the step-by-step test takes ten minutes).
Autodesk's help also says Personal use has other restrictions (for example, the web client is not included, and the release notes mention a limit of 10 editable documents), so check the current comparison page.
Measuring your design against the limits#
Board area is assumed here to mean the area of the outline, not the area of the copper (Autodesk does not define it). A rectangle is width times height; a rounded corner removes a small amount (a 3 mm corner radius takes away about 1.9 mm2 per corner, since r2 x (1 - pi/4) = 9 x 0.215).
| Board | Outline | Area | Fits 80 cm2? |
|---|---|---|---|
| Arduino Uno-style shield | 68.6 x 53.3 mm | 36.6 cm2 | Yes, with 43 cm2 spare |
| Raspberry Pi HAT | 65 x 56.5 mm | 36.7 cm2 (less with corner cuts) | Yes |
| Square sensor node | 90 x 90 mm | 81 cm2 | No, just over |
| Square sensor node, trimmed | 88 x 90 mm | 79.2 cm2 | Yes, barely |
| Keyboard half PCB | 150 x 100 mm | 150 cm2 | No |
| Credit-card-sized board | 85.6 x 54 mm | 46.2 cm2 | Yes |
The square at the limit is about 89.4 mm on a side. If a board is only slightly over, trim empty corners or move a connector off-board onto a small daughter board before you restructure the whole design. Mounting-hole ears and breakaway tabs count toward the outline if they are drawn on the BoardOutline layer (a reasonable assumption; the limit's exact measurement is undocumented).
Planning a design inside two sheets and two layers#
Sheet budget. With two sheets, use sheet 1 for power, connectors and anything that touches the mechanical design, and sheet 2 for the signal-processing core. Cross between them with labelled nets (for example I2C_SDA, I2C_SCL, VCC_3V3). A typical 30 to 60 part design fits on two sheets if you keep each sheet at roughly one A4-landscape page of content. If you need a third sheet, merge decoupling capacitors next to the part they serve and remove purely decorative blocks before you split the project.
Layer budget. Two layers means signals on top and a near-continuous ground pour on the bottom. Numbers that make this work in practice:
- Keep the bottom layer for ground, with only short jumper traces (under 10 mm) when a signal cannot stay on top.
- Use 0.25 mm signal traces and 0.5 mm or wider for power on a 1 A rail (0.5 mm of 1 oz copper carries about 1 A with a modest temperature rise; check an IPC-2221 calculator for your case).
- Place decoupling capacitors within 3 mm of supply pins and add a ground via right next to each capacitor ground pad.
- Choose parts in packages you can route on two layers: SOIC, TSSOP and QFN with 0.5 mm pitch are fine; BGAs with 0.8 mm pitch generally need four or more layers because of escape routing.
When the limits are the wrong tool. If a design needs four layers for a controlled-impedance USB 2.0 pair at 90 ohm differential, DDR memory or a switching regulator with a tight loop, redesigning to fit two layers can cost more time than the limit saves. In that case decide early whether the project is hobby (stay inside the limits), or a commercial activity that requires a paid licence in the first place.
Eligibility and what a licence change means#
Personal use is for non-commercial projects. The 1,000 USD a year earnings threshold and the statement that buying Flex tokens moves a Personal account to the commercial version are not in the mirrored help; confirm them on Autodesk's licence pages. If you sell the boards, or use them in a product, you are likely outside the terms regardless of how small the board is. Educational licences have separate terms. Signal integrity analysis, if you need it, is a separate extension that Autodesk says is no longer available for new purchase or trial.
Common failure modes#
| Symptom | Likely cause | Fix |
|---|---|---|
| Cannot add a third sheet | Two-sheet cap | Merge sheets, or move shared parts (connectors) into sheet 1 |
| Layer Stack Manager refuses more than two copper layers | Layer cap | Redesign for two layers, or confirm the current layer allowance in your version |
| Outline accepted but warning appears when pouring or routing outside | Board area over 80 cm2 | Reduce the outline area; recompute with the table above |
| Imported EAGLE or paid-account board will not edit fully | Possibly the design exceeds the Personal caps (unconfirmed) | Cut the design down |
| Colleague on a paid plan edits your board and you cannot | Possibly the design exceeds your caps (unconfirmed) | Agree on staying inside the limits for shared boards |
Test procedure#
- In a new electronics design, add sheets until the command stops you; note the number.
- On the board, draw a 100 x 100 mm outline (100 cm2). Note any warning text and the version of Fusion (Help > About).
- Open Design > Layers > Layer Stack Manager and try a four-layer preset.
- Open QuickRoute > Autorouter and start it on a three-part test board; record whether it runs.
- On the Schematic Design toolbar try Simulate and run an Operating Point analysis of a voltage divider built from ngspice-simulation parts.
- Write the results with the date in a text note on sheet 1 so the information travels with the design.
Practice exercise#
Design a small project inside the limits and prove it. Target: a 3.3 V sensor board with a 6-pin header, a regulator, an I2C sensor and two LEDs on a 40 x 40 mm outline.
- Compute the outline area (16 cm2) and its margin against 80 cm2 (64 cm2 spare, so 5 times under the limit).
- Place all parts on sheet 1 and put only the header on sheet 2, tied by labelled nets. Confirm ERC is clean.
- Route as two layers with a bottom GND polygon, and count your vias. Expect fewer than 15.
- Resize the outline to 90 x 90 mm and see whether Fusion warns. Record the message and the version.
- Write down which of the unconfirmed items (4-layer allowance, autorouter, SPICE) behave as claimed on your install.
Related#
- Electronics Overview
- Board Layout
- Routing, Autorouter and Polygons