Board Layout

Overview#

Board layout turns connectivity into physical copper. The sequence matters: outline, rules, placement, critical routing, remaining routing, pours, then checks. Most PCB problems (noise, mechanical misfit, unmanufacturable details) come from skipping steps, especially placement.

Where to find it#

• Open the electronics design and select the 2D PCB tab, or use Switch > 2D PCB from the schematic.
• PCB Design toolbar tools include Modify > Move / Rotate / Flip / Mirror / Lock, Route Manual, Route > Via, Copper Pour, Place > Hole (NPTH), Fanout, Rework and the Unroute commands, plus Group, Dimension and Reposition (which replaced SMASH). The command line equivalents (MOVE, ROUTE, RIPUP, RATSNEST, HOLE, DIMENSION and so on) still work.
• The Display Layers panel and Design > Layers > Display show or hide layers; the command line equivalents are LAYER and DISPLAY. Flip Board views the opposite side without changing objects.

Step by step#

1. Set units and grid. Choose millimetres or mils with the Grid icon at the bottom of the window; Fusion's default component placement grid is 50 mil (1.27 mm). Use finer grids for fine-pitch SMD.
2. Draw the board outline. A new 2D PCB already has a default rectangular outline. Edit it with the Board Shape tools (Outline Polyline, Outline Spline, Outline Arc, Outline Circle), or draw lines on the BoardOutline layer (layer 20; older documentation calls it Dimension). The outline must be a single closed, non-self-intersecting contour; Fusion then colours the board area differently. Add mounting holes with Place > Hole (NPTH). If the outline is defined in the 3D PCB with constraints or projections, it is read-only in the 2D PCB.
3. Load design rules (see previous page).
4. Place connectors and fixed parts first. Connectors, switches, LEDs and mounting holes are dictated by the enclosure. Lock them with Modify > Lock > Lock if desired (Shift-click unlocks). Drag components onto the board with Modify > Move.
5. Place the rest by function. Put decoupling capacitors adjacent to the supply pins they serve. Keep noisy switching sections away from sensitive analog. Use airwires to guide you; shorter airwires mean easier routing.
6. Check mechanical fit. Use Switch > 3D PCB to confirm height and clearance (see 3D page).
7. Route critical nets (power, clocks, differential pairs) by hand, then the rest.
8. Add copper pours for ground (see polygons page).
9. Silkscreen cleanup. Use Reposition and Move to place reference designators so they are readable and not on pads; add polarity marks and a version label.
10. Run DRC and fix.

Options reference#

Autodesk notes that layer names were updated to match industry terms and that legacy files are unaffected, so you may see new names, legacy names or both. Layers are grouped into categories (Copper, Mechanical, Silkscreen, Mask Openings, Exclusions, Documentation, User Defined, Legacy).

Tips and pitfalls#

Tip: Place first, route second. If you cannot route a net after placement, the cure is almost always moving parts, not fighting the router.

Warning: An unclosed board outline causes bad fabrication output and errors in 3D PCB. Verify the outline is a single closed loop with no gaps (zoom in and check endpoints).

Tip: Keep the return path in mind: a continuous ground plane under high-speed traces matters more than clever routing.

Warning: Parts placed on the bottom should be intentionally flipped. Accidental flipping puts silkscreen and pad-1 markers on the wrong side.

Tip: Use a grid that suits the smallest pitch part but do not route everything on a micro grid; it makes manual tidying painful.

Tip: Route power with wide traces first, using net class or design rule values; later signal traces fit around them.

Practice exercise#

Draw a 40 mm x 25 mm outline with 3 mm corner radii and four 3 mm mounting holes (Hole (NPTH)). Place a 2-pin connector on the left edge, a resistor and an LED on the right. Route the 5 V and ground nets manually with 0.4 mm traces and run DRC.

Worked example: placing a 5 V to 3.3 V sensor board#

Board 45 x 30 mm, two layers, USB-C power on the left edge, a 3.3 V LDO, an ESP32-class module, an I2C sensor and a 6-pin programming header.

1. Fixed parts first. Place the USB-C receptacle with its centre 3.5 mm in from the left edge so the shell overhangs correctly (check the datasheet; most receptacles need the front 1 to 1.5 mm past the edge). Place four M3 holes 3.5 mm in from each corner: centres at (3.5, 3.5), (41.5, 3.5), (3.5, 26.5), (41.5, 26.5) mm with a 3.2 mm drill and a keepout ring of 6 mm diameter.
2. Power chain. Order left to right: USB-C, fuse or ferrite, bulk capacitor, LDO, output capacitor. The LDO input and output capacitors must be within 3 mm of their pins.
3. Module placement. Put the antenna end of the module at the board edge with a copper keepout beneath the antenna region. Without that keepout the range drops sharply.
4. Sensor placement. Keep the sensor 10 mm or more from the LDO and regulator inductor if there is one, because heat shifts temperature readings; 1 degree C of self-heating from a 1 W dropper is a typical error.
5. Header and indicators. Put programming pads on the same edge as the USB-C so one hand holds the board.
6. Check airwires. With parts placed (the ratsnest keeps airwires as short as possible), look for crossing airwire bundles; if more than three cross, swap part positions before routing.

Placement heuristics with numbers#

The values below are general PCB practice, not Autodesk data.

Layer stack and setup string#

Set the stack-up in the Layer Stack Manager (Design > Layers > Layer Stack Manager): choose a preset or use Add Layer Pair / Remove Layer Pair (the layer count stays even with Maintain Symmetry), set each layer's Material and Type, and add blind, buried or micro vias with Add Via. Autodesk's example numbers outer layers first (1 and 16, then 2 and 15, and so on). Stack-ups can be saved as .estackup presets. The (1*16) and (1*2:3*14:15*16) setup strings are EAGLE-era notation that Autodesk's current pages do not use. Whether four copper layers are allowed on Personal use is unconfirmed (see the limits page). Typical thicknesses (general guidance): 1.6 mm finished board; 1 oz (35 um) outer copper.

Using polygons and keepouts while placing#

Place keepouts early: restrict areas under antennas on the RestrictCopper layer (the Restrict Area command in the Polygon dropdown places a shape there and lets you pick Restricted Layers), around mounting holes, and under modules that radiate heat. Autodesk's copper pour page says to create pours after the board outline and stack-up are set but before routing traces; it also notes that turning auto-pour off on dense boards keeps the canvas fast, and that you must then run Re-fill Copper Pours manually.

Edge-related details#

• The board outline on the BoardOutline layer (20) must be one closed, non-self-intersecting contour of lines and arcs. A rectangle with 3 mm corners is four lines and four arcs, no gaps, and no overlapping segments. Run DISPLAY NONE; DISPLAY 20 to see only the outline and inspect the end points.
• Autodesk says mounting holes and milling contours are drawn on layer 46 (Milling); check with the fabricator how slots and cutouts should be supplied.
• Breakaway panels (V-score) need component-free margins of about 1 mm on each side of the score line (general guidance); coordinate with the fabricator.

Manual routing workflow#

1. Route power first with the power net class using Route Manual (Trace Bend options: Ctrl + right-click cycles them); avoid sharp corners; use 45 degree bends.
2. Route clocks, then high-speed or sensitive signals, keeping them short and away from power lines.
3. Route the remaining nets, then check for acute angles.
4. Change layers only through vias (click the middle mouse button during routing to drop one, or use Route > Via); place a ground via next to the signal via when a trace crosses from top to bottom over a ground plane.
5. Re-check remaining airwires; the DRC Air Wire and Unconnected Lines rules flag any left unrouted.

Silkscreen and documentation#

General guidance: text height 0.8 to 1.0 mm with a line width of 0.15 mm is readable on most fabs. Put the board name, revision and date on the top silkscreen, for example SENSOR V1.2 2026-10. Add pin 1 marks, polarity marks (a + beside electrolytic capacitor positives), and connector labels (5V, GND, TX, RX). Check bottom-side text orientation in a Gerber viewer (or with Flip Board) before ordering.

Failure modes and fixes#

Practice exercise#

Lay out the sensor board described above (45 x 30 mm).

1. Draw the outline with 3 mm corner radii and four M3 holes at the coordinates given. Confirm the holes are non-plated.
2. Place the USB-C, LDO, two 10 uF capacitors, one 100 nF capacitor, a sensor and a 6-pin header.
3. Look at the airwires and count crossings. Move parts until fewer than three cross.
4. Route the 5 V and 3.3 V nets at 0.5 mm, everything else at 0.25 mm. Add a GND via beside every layer change.
5. Run DRC with a 0.2 mm Copper Clearance, and add a version string to the silkscreen. Record the final routed length of the 3.3 V net.

Related#

• Routing, Autorouter and Polygons
• ERC, Design Rules and DRC
• 3D PCB and ECAD-MCAD Sync